Rtl Open Source Projects

Beautiful static documentation for your API

🧱 A suite of React components .

Program to decode radio transmissions from devices on the ISM bands (and other frequencies)

A draggable and resizable grid layout, for Vue.js.

Chisel: A Modern Hardware Design Language

RF transmitter for Raspberry Pi

MyLayout is a powerful iOS UI framework implemented by Objective-C. It integrates the functions with Android Layout,iOS AutoLayout,SizeClass, HTML CSS float and flexbox and bootstrap. So you can use LinearLayout,RelativeLayout,FrameLayout,TableLayout,FlowLayout,FloatLayout,PathLayout,GridLayout,LayoutSizeClass to build your App 自动布局 UIView UITableView UICollectionView RTL

SDR Rx/Tx software for Airspy, Airspy HF+, BladeRF, HackRF, LimeSDR, PlutoSDR, RTL-SDR, SDRplay and FunCube

Rocket Chip Generator

Verilator open-source SystemVerilog simulator and lint system

:cactus: A responsive, clean and simple theme for Hexo.

OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/

Metis - Free Bootstrap 5 Admin Dashboard Template

Tailwind CSS components that support RTL languages & fully responsive based on Flexbox & CSS Grid with elegant Dark Mode 🚀 ☄️.

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

An rtl-sdr receiver for Itron ERT compatible smart meters operating in the 900MHz ISM band.

Fast Swift Views layouting without auto layout. No magic, pure code, full control and blazing fast. Concise syntax, intuitive, readable & chainable. [iOS/macOS/tvOS/CALayer]

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

SonicBOOM: The Berkeley Out-of-Order Machine

RTL, Cmodel, and testbench for NVDLA

Scala based HDL

OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

Framework for transforming Cascading Style Sheets (CSS) from Left-To-Right (LTR) to Right-To-Left (RTL)

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

Free Bootstrap 5 admin/dashboard template

Spectrum analyzer for multiple SDR platforms (PyQtGraph based GUI for soapy_power, hackrf_sweep, rtl_power, rx_power and other backends)

An efficient TabLayout library implemented with RecyclerView.

CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform

Software-defined radio receiver application built on GNU Radio with a web-based UI and plugins. In development, usable but incomplete. Compatible with RTL-SDR.

Aviation weather and traffic receiver based on RTL-SDR.

Analyze RF signals on Android with HackRF, RTL-SDR, Airspy (HF+) and HydraSDR

Open source, multi-user SDR receiver software with a web interface

A simple yet powerful JQuery star rating plugin with fractional rating support.

Attify OS - Distro for pentesting IoT devices

FireSim: Fast and Effortless FPGA-accelerated Hardware Simulation with On-Prem and Cloud Flexibility

SCR1 is a high-quality open-source RISC-V MCU core in Verilog

Veryl: A Modern Hardware Description Language

A list of cool projects made in Iran

NRSC-5 receiver for rtl-sdr

VeeR EH1 core

RTL Theme for Bootstrap v3.x

Various HDL (Verilog) IP Cores

An FPGA-based USB 1.1 (full-speed) device core to implement USB-serial, USB-camera, USB-audio, USB-hid, etc. It requires only 3 FPGA common IOs rather than additional chips. 基于FPGA的USB 1.1 (full-speed) device端控制器，可实现USB串口、USB摄像头、USB音频、U盘、USB键盘等设备，只需要3个FPGA普通IO，而不需要额外的接口芯片。

A Flutter package which implements a ConvexAppBar to show a convex tab in the bottom bar. Theming supported.

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: FPGA, hardware

The best React custom scrollbars component

Salamandra is a tool to find spy microphones that use radio freq to transmit. It uses SDR.

:earth_africa: Map location picker component for Android. Based on Google Maps. An alternative to Google Place Picker.

📡 ✈️ App that picks up ADS-B radio signals from airplanes and plots them in real time on a map in your browser

A cross platform Python frequency scanning GUI for the OsmoSDR rtl-sdr library

Functional verification project for the CORE-V family of RISC-V cores.

rtl-sdr spectrum analyzer

Portable RISC-V System-on-Chip implementation: RTL, debugger and simulators

OpenROAD's scripts implementing an RTL-to-GDS Flow. Documentation at https://openroad-flow-scripts.readthedocs.io/en/latest/

⚡ Full RTL Package - Bootstrap Responsive Components For Iranian's 🇮🇷

Repository for basic (and not so basic) Verilog blocks with high re-use potential

Simple tools to make reverse engineering and console cowboying easier, primarily by data translation and manipulation + file handle piping. Mostly *nix tools with an emphasis on macOS.

Simple RISC-V 3-stage Pipeline in Chisel

NonTrivial-MIPS is a synthesizable superscalar MIPS processor with branch prediction and FPU support, and it is capable of booting linux.

Very simple and lightweight vanilla javascript library for creating a custom scrollbar cross-browser.